Antmicro exhibits at RISC-V Workshop Zurich with new Renode and FPGA demonstrators

Published: June 10th, 2019

RISC‑V Zurich Workshop

From June 11-12th 2019, Antmicro, a Platinum Founding Member of the RISC‑V Foundation, will be exhibiting at the RISC‑V Workshop Zurich. The stage is set, and the full agenda features talks, demonstrators, an exhibition area, poster sessions and more.

As tabletop sponsor, we will be welcoming participants at Antmicro’s stand no. 6 throughout the Workshop, where two new exciting demonstrators of our open source simulation framework Renode with both multi-node and FPGA-oriented functionalities have been prepared to take you through the technology opportunities made possible by our open digital design approach.

On Day 2, Michael Gielda, VP Business Development at Antmicro and member of the RISC‑V Foundation’s Marketing Committee, will preside over the afternoon session and welcoming industry representatives, speakers and community members alike.

Day 2 will also see a dedicated poster session from industry leaders providing illustrations of real market implementations of RISC‑V. Building on our partnership with fellow RISC‑V Foundation member and silicon security company Dover Microsystems, Antmicro will be presenting an introduction to "Design Cycle Acceleration for Hardware/Software Co-Design with Renode" by demonstrating the case of how Renode proved crucial in the development of Dover’s innovative CoreGuard solution.

If you’re attending the Zurich Workshop, visit Antmicro at stand no. 6 in the exhibition area or book a meeting directly with our team by writing to

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