Mar 30
2023
OpenTitan is a community-driven open source Root of Trust project that provides secure, tested, and transparent building blocks and infrastructure for designing and implementing trusted computing systems. On the basic level, OpenTitan offers a reference Root of Trust SoC design that includes a set of security features and peripherals like a NIST SP 800-90B compliant entropy source or a CSRNG, which can be customized to meet your project’s security requirements. Read more
Mar 9
2023
Proper testing of embedded software is very difficult, but also crucial to successful product development. In Antmicro’s work, testing has always played a pivotal role - the open source Renode simulation framework that we maintain was initially created as an internal tool to improve testability and reliability of our work. With Renode, we promote thorough testing at every stage of a project, on all levels of complexity, including multi-node communication and simulation of external conditions. Read more
Jan 26
2023
Antmicro’s work with camera systems often results in new reusable tools and libraries helpful for debugging video devices and applications. Some examples of such tools for working with v4l2 pipelines such as grabthecam, farshow, pyrav4l2 and Raviewer can be found on Antmicro’s Open Source Portal. Read more
Jan 19
2023
Support for co-simulating HDL models in Renode with Verilator has been an integral part of the framework since the 1.7.1 release, introducing a new dimension of flexibility and allowing Renode to cover ASIC and FPGA SoC development use cases. Renode is a versatile simulation framework that allows you to easily run unmodified software inside simulated environments composed of highly-reusable building blocks representing components of a platform; co-simulation allows you to attach an externally created peripheral, e.g., built with Verilog to a Renode simulation to function as any other part of the simulated system. This allows you to iterate your hardware RTL development while benefiting from the infrastructure, feature set, and speed of Renode running the rest of the system on a functional level. Thanks to recent developments for our customers interested in even more control over their simulated environment driven by the needs of advanced RISC‑V silicon development, support for Verilator in Renode has been expanded to allow CPUs simulated directly from RTL, which opens an array of new possibilities for developing new CPU core IP and combining it with Renode’s vast portfolio of peripheral IP for a complete system able to run advanced software. Read more
Dec 29
2022
Originally issued by Microchip. Read more