Jun 10 2019
From June 11-12th 2019, Antmicro, a Platinum Founding Member of the RISC‑V Foundation, will be exhibiting at the RISC‑V Workshop Zurich. The stage is set, and the full agenda features talks, demonstrators, an exhibition area, poster sessions and more. Read more
May 20 2019
Antmicro has recently released Renode 1.7 and 1.7.1, one of the largest updates yet of the open source multi-node simulation framework that has been gaining popularity and showcasing new market implementations in the RISC‑V ecosystem. With a range of important new platforms (primarily FPGA softcores) and introducing experimental support for Time-Sensitive Networking (TSN) and Precision Time Protocol (PTP) for ARM and RISC‑V platforms, as well as numerous fixes and general improvements, Renode now offers even more flexibility and scalability in a unique software/hardware co-development design cycle. Read more
Apr 30 2019
Antmicro and Microchip hosting webinar series on how to use the free and open Renode platform to build systems targeting the RISC‑V based PolarFire™ SoC FPGA architecture Read more
Apr 18 2019
An interesting article was published yesterday by All About Circuits on "Decreasing the Length of Design Cycle in Co-Designed SoCs with Renode". In collaboration with our fellow RISC‑V Foundation member, partner and customer Dover Microsystems, we explain how the use of open-source functional simulators like Antmicro’s Renode can be an integral part of hardware-software co-design efforts. Read more
Feb 19 2019
As new opportunities unfold for modern edge computing and the bold concept of open source digital design is paving its way through the silicon industry, Antmicro is kicking into high gear with new platforms and new partnerships which we will be proudly presenting at Embedded World 2019 in Nuremberg, Germany from February 26th to 28th. Read more