Sep 17
2021
Co-simulation is extremely useful for developing complex systems, especially those targeting FPGA SoCs, where specialized IP cores often interact with advanced software running on the hard CPU. Co-simulation has been available in Renode for quite a while now and we are constantly adding more and more features as well as ready-to-use peripherals. This is necessary for the work we are doing with our customers related to silicon prototyping, advanced video device development Read more
Sep 2
2021
Over the many years of development, Renode, our open source simulation framework, has been successfully used in various contexts, from the development on the smallest microcontrollers to complex, multi-core and multi-node environments, from driver implementation, through full product simulation, to supporting development of complex networking protocols. One example of the latter has been our work to bring Time Sensitive Networking to the Zephyr RTOS, a protocol seeing increased use in aerospace applications, just like Renode itself. Read more
Jul 22
2021
The Rust programming language has generated a lot of enthusiasm in many developer ecosystems, especially security-focused ones, inspiring a wave of interesting projects like Oreboot, Precursor’s xous and Tock OS. Rust is a rapidly evolving and extremely versatile language that offers many crucial safety features built into the language design choices and toolchain themselves - and many new low-level projects choose it for the promise of a modern, powerful yet secure codebase. Read more
Jul 16
2021
For several years now we have been working with the Google TensorFlow Lite Micro team on making their ML framework aimed at MCUs and other low-power devices easier to test and demonstrate using our open source simulation framework, Renode. Read more
Jun 30
2021
Co-simulating HDL has been possible in Renode since the 1.7.1 release, but the functionality - critical for hardware/software co-development as well as FPGA use cases - is constantly evolving based on the needs of our customers like Google and Microchip. To quickly recap, by co-simulation we mean a scenario where a part of the system is simulated in Renode but some specific peripheral or subsystem is simulated directly from HDL, e.g. Verilog. To achieve this, Renode integrates with Verilator, a fast and popular open source HDL simulator, which we are helping our customers adopt as well as expanding its capabilities to cover new use cases. Peripherals simulated directly from HDL are typically called Verilated peripherals. Read more