Sep 5
2025
Antmicro's open source Renode simulation framework executes code using binary translation - if you run a Cortex-M target on your typical Linux, you need to translate the Arm-M instruction set to x86-64. However, if you want to simulate an x86 platform and you're running on a host with matching architecture, there should be no need to translate anything - you could just run the code of the guest payload. Read more
Aug 22
2025
Silicon Labs' 32-bit ARM Cortex-M33-based Wireless Gecko Series 2 SoCs have been available in Renode for a while now. Some time ago, thanks to the collaboration between Antmicro and Silicon Labs, this support has been extended to cover their 2.4 GHz multi-protocol radio connectivity functionality, allowing you to develop and test complex networks of low-power IoT devices built around the popular chip family in Antmicro's flagship open source simulation framework. Read more
Jul 28
2025
One of Renode's practical advantages for real-world systems is its ability to simulate heterogeneous multi-core systems, such as ones including both Cortex-A and Cortex-M cores. Read more
Jun 17
2025
Antmicro's open source Coverview tool facilitates automated generation of interactive coverage dashboards for a variety of use cases. In a recent blog article we described its application in digital design projects, for RTL coverage visualization and analysis. Read more
May 16
2025
The Capability Hardware Extension to RISC‑V for Internet of Things (CHERIoT) project provides a hardware platform built around a modified RISC‑V Ibex core, designed for enhanced security through limited access of executed applications to individual components of the system. Developed by a group of commercial and university partners, it implements CHERI (Capability Hardware Enhanced RISC Instructions) for the RISC‑V ISA. Read more